Also, it seems you construct the physical address by masking out
bits from
the effective address. Most implementations will trap or
machine check if
you address outside of physical address space, instead.
Well the only case where I remember to have hit a real RMO case
is on the PS3 - that issues a data/instruction storage interrupt
when accessing anything > 8MB in real mode.
So I'd argue this is heavily implementation specific.
It is. So what is the behaviour you want to implement?
The one below.
I'm sorry, I lost it. "Below"?
Apart from that what I'm trying to cover is that on ppc64
accessing 0xc0000000000000 in real mode gets you 0x0. Is there a
better name for this?
(You missed two zeroes).
In hypervisor real mode, the top few bits are magic. They are
used for e.g.
enabling hypervisor offset real mode.
In supervisor real mode, those bits are ignored (and all other
bits that do
not correspond to physical address lines may also be ignored).
So which bits exactly are reserved? I couldn't find a reference to
that part.
If by "reserved" you mean "cannot be used for addressing", it's the
top four
bits. Book III-S chapter 5.7.3 in the Power Architecture 2.06 document.
Implementations are allowed to ignore more bits than that.
I believe in earlier versions of the architecture it was the top two
bits,
not four, but maybe I misremember.
Maybe you want to call it physical_address_mask or similar?
PAM - doesn't sound bad :).
And miraculously nothing in the Power arch uses that acronym yet! But I
would spell it out if I were you, acronyms are confusing.
Segher
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