On Fri, Sep 03, 2010 at 11:45:22AM -0400, Eric Millbrandt wrote:
> Tighten up time timing around the gpio reset functionality.  Add a 200ns
> delay before remuxing the pins back to ac97 to comply with the ac97 spec.
> This delay ensures that sync and sdata_out are held low while reset
> transitions to high.
> 
> Signed-off-by: Eric Millbrandt <emillbra...@dekaresearch.com>
> ---
> 
> Scope shots are availible upon request.
> 
>  arch/powerpc/platforms/52xx/mpc52xx_common.c |    5 ++++-
>  1 files changed, 4 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c 
> b/arch/powerpc/platforms/52xx/mpc52xx_common.c
> index 6e90531..79adfe7 100644
> --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
> @@ -326,11 +326,14 @@ int mpc5200_psc_ac97_gpio_reset(int psc_number)
>         clrbits8(&wkup_gpio->wkup_dvo, reset);
> 
>         /* wait at lease 1 us */

Maybe you could fix this typo as well while you are here?

> -       udelay(2);
> +       udelay(1);
> 
>         /* Deassert reset */
>         setbits8(&wkup_gpio->wkup_dvo, reset);
> 
> +       /* wait at least 200ns */
> +       __delay(7);

ndelay(200)?

> +
>         /* Restore pin-muxing */
>         out_be32(&simple_gpio->port_config, mux);
> 
> --
> 1.6.3.1
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