On Jun 23, 2011, at 2:48 PM, Timur Tabi wrote: > To ensure that the DIU pixel clock will not be set to an invalid value, > clamp the PXCLK divider to the allowed range (2-255). This also acts as > a limiter for the pixel clock. > > Signed-off-by: Timur Tabi <[email protected]> > --- > arch/powerpc/platforms/85xx/p1022_ds.c | 7 ++++++- > 1 files changed, 6 insertions(+), 1 deletions(-)
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