On 09/01/2011 04:41 AM, LiuShuo wrote: > After doing some tests, I found that the elbc controller can read/write > 4k with one command > if we insert a FIR_OP_NOP between first half reading/wring and second > half reading/writing.(delay for something ?)
>From the docs: > A NOP instruction that appears in FIR ahead of the last instruction > is executed with the timing of a regular command instruction, but > neither LFCLE nor LFWE are asserted. Thus a NOP instruction may be > used to insert a pause matching the time taken for a regular command > write. So the NOP does generate a delay. Would be nice to know exactly why it's required. Have you tried doing this under load with parallel NOR activity? With CE-don't-care operation, during the times when CE is not asserted, does it matter what happens with CLE/ALE/RE? These signals could be driven for another chipselect during that time. -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
