On Sep 16, 2011, at 10:39 AM, Kumar Gala wrote: > On FSL Book-E devices we support multiple large TLB sizes and so we can > get into situations in which the initial 1G TLB size is too big and > we're asked for a size that is not mappable by a single entry (like > 512M). The single entry is important because when we bring up secondary > cores they need to ensure any data structure they need to access (eg > PACA or stack) is always mapped. > > So we really need to determine what size will actually be mapped by the > first TLB entry to ensure we limit early memory references to that > region. We refactor the map_mem_in_cams() code to provider a helper > function that we can utilize to determine the size of the first TLB > entry while taking into account size and alignment constraints. > > Signed-off-by: Kumar Gala <ga...@kernel.crashing.org> > --- > arch/powerpc/mm/fsl_booke_mmu.c | 31 +++++++++++++++++++------------ > arch/powerpc/mm/mmu_decl.h | 2 ++ > arch/powerpc/mm/tlb_nohash.c | 21 ++++++++++++++++++--- > 3 files changed, 39 insertions(+), 15 deletions(-)
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