On Nov 18, 2011, at 11:50 AM, Timur Tabi wrote: > The Freescale P1022 has a unique pin muxing "feature" where the DIU video > controller's video signals are muxed with 24 of the local bus address signals. > When the DIU is enabled, the bulk of the local bus is disabled, preventing > access to memory-mapped devices like NOR flash and the pixis FPGA. > > In this situation, the pixis supports "indirect mode", which allows access > to the pixis itself by reading/writing addresses on specific local bus > chip selects. CS0 is used to select which pixis register to access, and > CS1 is used to read/write the value. > > To support this, we introduce another board-control child node of the > localbus node that contains a 'reg' property for CS0 and CS1. This will > produce the correct physical addresses for CS0 and CS1. > > Signed-off-by: Timur Tabi <ti...@freescale.com> > --- > arch/powerpc/boot/dts/p1022ds.dts | 14 ++++++++++++++ > 1 files changed, 14 insertions(+), 0 deletions(-)
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