Hi Kumar,
Scott reviewed this patch and MSI errata patch for weeks.
Here is the link for MSI errata patch:
http://patchwork.ozlabs.org/patch/233211/
Could you please have a review and ACK them if they
look good to you too?
Thanks.
- Hongtao
> -----Original Message-----
> From: Jia Hongtao-B38951
> Sent: Wednesday, April 10, 2013 10:53 AM
> To: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org
> Cc: Wood Scott-B07421; Li Yang-R58472; Jia Hongtao-B38951
> Subject: [PATCH V5] powerpc/MPIC: Add get_version API both for internal
> and external use
>
> MPIC version is useful information for both mpic_alloc() and mpic_init().
> The patch provide an API to get MPIC version for reusing the code.
> Also, some other IP block may need MPIC version for their own use.
> The API for external use is also provided.
>
> Signed-off-by: Jia Hongtao <hongtao....@freescale.com>
> Signed-off-by: Li Yang <le...@freescale.com>
> ---
> V5:
> * add MPIC_FSL check for fsl_mpic_get_version().
>
> V4:
> * change the name of function from mpic_get_version() to
> fsl_mpic_get_version().
>
> V3:
> * change the name of function from mpic_primary_get_version() to
> fsl_mpic_primary_get_version().
> * return 0 if mpic_primary is null.
>
> V2:
> * Using mpic_get_version() to implement mpic_primary_get_version()
>
> arch/powerpc/include/asm/mpic.h | 3 +++
> arch/powerpc/sysdev/mpic.c | 32 +++++++++++++++++++++++++-------
> 2 files changed, 28 insertions(+), 7 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/mpic.h
> b/arch/powerpc/include/asm/mpic.h index c0f9ef9..ea6bf72 100644
> --- a/arch/powerpc/include/asm/mpic.h
> +++ b/arch/powerpc/include/asm/mpic.h
> @@ -393,6 +393,9 @@ struct mpic
> #define MPIC_REGSET_STANDARD MPIC_REGSET(0) /* Original
> MPIC */
> #define MPIC_REGSET_TSI108 MPIC_REGSET(1) /* Tsi108/109
> PIC */
>
> +/* Get the version of primary MPIC */
> +extern u32 fsl_mpic_primary_get_version(void);
> +
> /* Allocate the controller structure and setup the linux irq descs
> * for the range if interrupts passed in. No HW initialization is
> * actually performed.
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index d30e6a6..47ef4ba 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -1165,10 +1165,33 @@ static struct irq_domain_ops mpic_host_ops = {
> .xlate = mpic_host_xlate,
> };
>
> +static u32 fsl_mpic_get_version(struct mpic *mpic) {
> + u32 brr1;
> +
> + if (!(mpic->flags & MPIC_FSL))
> + return 0;
> +
> + brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> + MPIC_FSL_BRR1);
> +
> + return brr1 & MPIC_FSL_BRR1_VER;
> +}
> +
> /*
> * Exported functions
> */
>
> +u32 fsl_mpic_primary_get_version(void)
> +{
> + struct mpic *mpic = mpic_primary;
> +
> + if (mpic)
> + return fsl_mpic_get_version(mpic);
> +
> + return 0;
> +}
> +
> struct mpic * __init mpic_alloc(struct device_node *node,
> phys_addr_t phys_addr,
> unsigned int flags,
> @@ -1315,7 +1338,6 @@ struct mpic * __init mpic_alloc(struct device_node
> *node,
> mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE),
> 0x1000);
>
> if (mpic->flags & MPIC_FSL) {
> - u32 brr1;
> int ret;
>
> /*
> @@ -1326,9 +1348,7 @@ struct mpic * __init mpic_alloc(struct device_node
> *node,
> mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,
> MPIC_CPU_THISBASE, 0x1000);
>
> - brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> - MPIC_FSL_BRR1);
> - fsl_version = brr1 & MPIC_FSL_BRR1_VER;
> + fsl_version = fsl_mpic_get_version(mpic);
>
> /* Error interrupt mask register (EIMR) is required for
> * handling individual device error interrupts. EIMR @@ -
> 1518,9 +1538,7 @@ void __init mpic_init(struct mpic *mpic)
> mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf);
>
> if (mpic->flags & MPIC_FSL) {
> - u32 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> - MPIC_FSL_BRR1);
> - u32 version = brr1 & MPIC_FSL_BRR1_VER;
> + u32 version = fsl_mpic_get_version(mpic);
>
> /*
> * Timer group B is present at the latest in MPIC 3.1 (e.g.
> --
> 1.8.0
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