On 04/19/2013 05:47:38 AM, Zhao Chenhui wrote:
From: Li Yang <le...@freescale.com>
Signed-off-by: Li Yang <le...@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.z...@freescale.com>
---
.../devicetree/bindings/powerpc/fsl/pmc.txt | 59
+++++++++++--------
1 files changed, 34 insertions(+), 25 deletions(-)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
index 07256b7..f1f749f 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt
@@ -9,15 +9,20 @@ Properties:
"fsl,mpc8548-pmc" should be listed for any chip whose PMC is
compatible. "fsl,mpc8536-pmc" should also be listed for any chip
- whose PMC is compatible, and implies deep-sleep capability.
+ whose PMC is compatible, and implies deep-sleep capability and
+ wake on user defined packet(wakeup on ARP).
+
+ "fsl,p1022-pmc" should be listed for any chip whose PMC is
+ compatible, and implies lossless Ethernet capability during sleep.
"fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
compatible; all statements below that apply to "fsl,mpc8548-pmc"
also
apply to "fsl,mpc8641d-pmc".
Compatibility does not include bit assignments in
SCCR/PMCDR/DEVDISR; these
- bit assignments are indicated via the sleep specifier in each
device's
- sleep property.
+ bit assignments are indicated via the clock nodes. Device which
has a
+ controllable clock source should have a "fsl,pmc-handle" property
pointing
+ to the clock node.
Please respond to the feedback given on v1:
http://patchwork.ozlabs.org/patch/147177/
Also indicate, below the ---, what has changed from previous versions.
-Scott
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