We don't need to flush the dcache and invalidate the icache on the CPU which has CPU_FTR_COHERENT_ICACHE set. Also add the missing required isync in this case.
Signed-off-by: Kevin Hao <haoke...@gmail.com> --- v2: Add the isync. arch/powerpc/kernel/misc_64.S | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 971d7e7..992a78e 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S @@ -207,6 +207,10 @@ _GLOBAL(flush_inval_dcache_range) * void __flush_dcache_icache(void *page) */ _GLOBAL(__flush_dcache_icache) +BEGIN_FTR_SECTION + isync + blr +END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) /* * Flush the data cache to memory * -- 1.8.3.1 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
