Michael Neuling <[email protected]> writes:
> Aneesh Kumar K.V <[email protected]> wrote:
>
>> Runtime disable transactional memory feature looking at pa-features
>> device tree entry. This provides a mechanism to disable TM on P8
>> systems.
>
> What are we actually achieving with this?
PAPR compliance :) ? Also I wanted to disable guest kernel from doing
TM related save restore. Guest kernel already look at the cpu feature
before doing that. Hence needed a mechanism to disable the feature.
Things like
static inline void __switch_to_tm(struct task_struct *prev)
{
if (cpu_has_feature(CPU_FTR_TM)) {
tm_enable();
tm_reclaim_task(prev);
}
}
>
>> Signed-off-by: Aneesh Kumar K.V <[email protected]>
>> ---
>> arch/powerpc/kernel/prom.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
>> index 668aa4791fd7..537bd7e7db0b 100644
>> --- a/arch/powerpc/kernel/prom.c
>> +++ b/arch/powerpc/kernel/prom.c
>> @@ -161,6 +161,11 @@ static struct ibm_pa_feature {
>> {CPU_FTR_NODSISRALIGN, 0, 0, 1, 1, 1},
>> {0, MMU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0},
>> {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
>> + /*
>> + * We should use CPU_FTR_TM_COMP so that if we disable TM, it won't get
>> + * enabled via device tree
>> + */
>> + {CPU_FTR_TM_COMP, 0, 0, 22, 0, 0},
>
> What does this do to guests? Will it turn TM unavailable into an
> illegal instruction?
>
Good suggestion. I guess it should be facility unavailable interrupt ?
I should also make the sure __init_HFSCR only set HFSCR_TM only if the
cpu feature is enabled ?
-aneesh
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