From: Srivatsa S. Bhat <srivatsa.b...@linux.vnet.ibm.com>

Now that the support for fast sleep idle state is present, the KVM
standby threads can be put to fast sleep when they are either idle
or do not have a guest to run. Today they enter nap in these scenarios.
The purpose is to gain maximum power savings in a KVM scenario as well
when an entire cpu core is idle.

As a precursor, consolidate the code common across all idle states.

Signed-off-by: Srivatsa S. Bhat <srivatsa.b...@linux.vnet.ibm.com>
[ Changelog added by <pre...@linux.vnet.ibm.com> ]
Signed-off-by: Preeti U Murthy <pre...@linux.vnet.ibm.com>
---

 arch/powerpc/kvm/book3s_hv_rmhandlers.S |   30 ++++++++++++++++--------------
 1 file changed, 16 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index b031f93..43aa806 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -40,6 +40,17 @@
 #define NAPPING_CEDE   1
 #define NAPPING_NOVCPU 2
 
+#define IDLE_STATE_ENTER_SEQ_HV(IDLE_INST)                     \
+       /* Magic NAP/SLEEP/WINKLE mode enter sequence */        \
+       std     r0, HSTATE_SCRATCH0(r13);                       \
+       ptesync;                                                \
+       ld      r0, HSTATE_SCRATCH0(r13);                       \
+1:     cmpd    r0, r0;                                         \
+       bne     1b;                                             \
+       IDLE_INST;                                              \
+       b       .
+
+
 /*
  * Call kvmppc_hv_entry in real mode.
  * Must be called with interrupts hard-disabled.
@@ -325,13 +336,9 @@ kvm_do_nap:
        rlwimi  r4, r3, 0, LPCR_PECE0 | LPCR_PECE1
        mtspr   SPRN_LPCR, r4
        isync
-       std     r0, HSTATE_SCRATCH0(r13)
-       ptesync
-       ld      r0, HSTATE_SCRATCH0(r13)
-1:     cmpd    r0, r0
-       bne     1b
-       nap
-       b       .
+       IDLE_STATE_ENTER_SEQ_HV(PPC_NAP)
+       /* No return */
+
 
 /******************************************************************************
  *                                                                            *
@@ -2027,13 +2034,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
        mtspr   SPRN_LPCR,r5
        isync
        li      r0, 0
-       std     r0, HSTATE_SCRATCH0(r13)
-       ptesync
-       ld      r0, HSTATE_SCRATCH0(r13)
-1:     cmpd    r0, r0
-       bne     1b
-       nap
-       b       .
+       IDLE_STATE_ENTER_SEQ_HV(PPC_NAP)
+       /* No return */
 
 33:    mr      r4, r3
        li      r3, 0

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