The patch prints 4 PCIE or AER config registers each line, which
is part of the EEH log so that it looks a bit more compact.
Suggested-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
Signed-off-by: Gavin Shan <gws...@linux.vnet.ibm.com>
---
arch/powerpc/kernel/eeh.c | 37 +++++++++++++++++++++++++++++++------
1 file changed, 31 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index aa33656..123c151 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -157,12 +157,13 @@ __setup("eeh=", eeh_setup);
* This routine captures assorted PCI configuration space data,
* and puts them into a buffer for RTAS error logging.
*/
-static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
+static size_t eeh_gather_pci_data(struct eeh_dev *edev, char *buf, size_t len)
{
struct device_node *dn = eeh_dev_to_of_node(edev);
u32 cfg;
- int cap, i;
+ int cap, i, j;
int n = 0;
+ char buffer[128];
n += scnprintf(buf+n, len-n, "%s\n", dn->full_name);
pr_warn("EEH: of node=%s\n", dn->full_name);
@@ -204,10 +205,22 @@ static size_t eeh_gather_pci_data(struct eeh_dev *edev,
char * buf, size_t len)
n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
pr_warn("EEH: PCI-E capabilities and status follow:\n");
- for (i=0; i<=8; i++) {
+ for (i=0, j=0; i<=8; i++) {
eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
- pr_warn("EEH: PCI-E %02x: %08x\n", i, cfg);
+
+ if ((i % 4) == 0) {
+ memset(buffer, 0, sizeof(buffer));
+ j = scnprintf(buffer, sizeof(buffer),
+ "EEH: PCI-E %02x: %08x ",
+ 4*i, cfg);
+ } else {
+ j += scnprintf(buffer+j, sizeof(buffer)-j,
+ "%08x ", cfg);
+ }
+
+ if ((i % 4) == 3 || i >= 8)
+ pr_warn("%s\n", buffer);
}
}
@@ -217,10 +230,22 @@ static size_t eeh_gather_pci_data(struct eeh_dev *edev,
char * buf, size_t len)
n += scnprintf(buf+n, len-n, "pci-e AER:\n");
pr_warn("EEH: PCI-E AER capability register set follows:\n");
- for (i=0; i<14; i++) {
+ for (i=0, j=0; i<=13; i++) {
eeh_ops->read_config(dn, cap+4*i, 4, &cfg);
n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
- pr_warn("EEH: PCI-E AER %02x: %08x\n", i, cfg);
+
+ if ((i % 4) == 0) {
+ memset(buffer, 0, sizeof(buffer));
+ j = scnprintf(buffer, sizeof(buffer),
+ "EEH: PCI-E AER %02x: %08x ",
+ 4*i, cfg);
+ } else {
+ j += scnprintf(buffer+j, sizeof(buffer)-j,
+ "%08x ", cfg);
+ }
+
+ if ((i % 4) == 3 || i >= 13)
+ pr_warn("%s\n", buffer);
}
}
--
1.8.3.2
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