Fast sleep is an idle state, where the core and the L1 and L2
caches are brought down to a threshold voltage. This also means that
the communication between L2 and L3 caches have to be fenced. However
the current P8 chips have a bug wherein this fencing between L2 and
L3 caches get delayed by a cpu cycle. This can delay L3 response to
the other cpus if they request for data during this time. Thus they
would fetch the same data from the memory which could lead to data
corruption if L3 cache is not flushed.
Patch 4 adds support to work around this.
'Deep Winkle' is a deeper idle state where core and private L2 are powered
off. While it offers higher power savings, it is at the cost of losing
hypervisor register state and higher latency.
Patch 5-9 adds support for winkle and uses it for offline cpus.
Patch 1 - Moves parameters required discover idle states to a location
common to both cpuidle driver and powernv core code
Patch 2 - Populates idle state details from device tree
Patch 3 - Enables cpus to run guest after waking up from fastsleep/winkle
Cc: Benjamin Herrenschmidt <b...@kernel.crashing.org>
Cc: Paul Mackerras <pau...@samba.org>
Cc: Michael Ellerman <m...@ellerman.id.au>
Cc: Rafael J. Wysocki <r...@rjwysocki.net>
Cc: Srivatsa S. Bhat <sriva...@mit.edu>
Cc: Preeti U. Murthy <pre...@linux.vnet.ibm.com>
Cc: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com>
Cc: Rob Herring <robh...@kernel.org>
Cc: Grant Likely <grant.lik...@linaro.org>
Cc: devicet...@vger.kernel.org
Cc: linux...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Preeti U Murthy (2):
cpuidle/powernv: Populate cpuidle state details by querying the
device-tree
powerpc/powernv/cpuidle: Add workaround to enable fastsleep
Shreyas B. Prabhu (6):
powerpc/kvm/book3s_hv: Enable CPUs to run guest after waking up from
fast-sleep
powerpc/powernv: Add OPAL call to save and restore
powerpc: Adding macro for accessing Thread Switch Control Register
powerpc/powernv: Add winkle infrastructure
powerpc/powernv: Discover and enable winkle
powerpc/powernv: Enter deepest supported idle state in offline
Srivatsa S. Bhat (1):
powerpc/powernv: Enable Offline CPUs to enter deep idle states
arch/powerpc/include/asm/machdep.h | 4 +
arch/powerpc/include/asm/opal.h | 10 ++
arch/powerpc/include/asm/paca.h | 3 +
arch/powerpc/include/asm/ppc-opcode.h | 2 +
arch/powerpc/include/asm/processor.h | 6 +-
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/kernel/asm-offsets.c | 1 +
arch/powerpc/kernel/exceptions-64s.S | 37 ++---
arch/powerpc/kernel/idle.c | 30 ++++
arch/powerpc/kernel/idle_power7.S | 83 +++++++++-
arch/powerpc/platforms/powernv/opal-wrappers.S | 2 +
arch/powerpc/platforms/powernv/powernv.h | 8 +
arch/powerpc/platforms/powernv/setup.c | 217 +++++++++++++++++++++++++
arch/powerpc/platforms/powernv/smp.c | 13 +-
arch/powerpc/platforms/powernv/subcore.c | 15 ++
drivers/cpuidle/cpuidle-powernv.c | 40 ++++-
16 files changed, 439 insertions(+), 33 deletions(-)
--
1.9.0
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