On Thursday, May 07, 2015 05:49:22 PM Preeti U Murthy wrote: > On 05/05/2015 02:11 PM, Preeti U Murthy wrote: > > On 05/05/2015 12:03 PM, Shilpasri G Bhat wrote: > >> Hi Preeti, > >> > >> On 05/05/2015 09:30 AM, Preeti U Murthy wrote: > >>> Hi Shilpa, > >>> > >>> On 05/04/2015 02:24 PM, Shilpasri G Bhat wrote: > >>>> Re-evaluate the chip's throttled state on recieving OCC_THROTTLE > >>>> notification by executing *throttle_check() on any one of the cpu on > >>>> the chip. This is a sanity check to verify if we were indeed > >>>> throttled/unthrottled after receiving OCC_THROTTLE notification. > >>>> > >>>> We cannot call *throttle_check() directly from the notification > >>>> handler because we could be handling chip1's notification in chip2. So > >>>> initiate an smp_call to execute *throttle_check(). We are irq-disabled > >>>> in the notification handler, so use a worker thread to smp_call > >>>> throttle_check() on any of the cpu in the chipmask. > >>> > >>> I see that the first patch takes care of reporting *per-chip* throttling > >>> for pmax capping condition. But where are we taking care of reporting > >>> "pstate set to safe" and "freq control disabled" scenarios per-chip ? > >>> > >> > >> IMO let us not have "psafe" and "freq control disabled" states managed > >> per-chip. > >> Because when the above two conditions occur it is likely to happen across > >> all > >> chips during an OCC reset cycle. So I am setting 'throttled' to false on > >> OCC_ACTIVE and re-verifying if it actually is the case by invoking > >> *throttle_check(). > > > > Alright like I pointed in the previous reply, a comment to indicate that > > psafe and freq control disabled conditions will fail when occ is > > inactive and that all chips face the consequence of this will help. > > From your explanation on the thread of the first patch of this series, > this will not be required. > > So, > Reviewed-by: Preeti U Murthy <pre...@linux.vnet.ibm.com>
OK, so is the whole series reviewed now? -- I speak only for myself. Rafael J. Wysocki, Intel Open Source Technology Center. _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev