Hi Anshuman, Was there a cover letter for this series that I missed?
On Mon, 2015-06-08 at 17:08 +0530, Anshuman Khandual wrote: > BHRB is a rolling buffer. Hence we might end up in a situation where Could you spell out what BHRB stands for? > we have read one target address but when we try to read the next entry > indicating the from address of the targe, the buffer just overflows. target? > In this case, the captured from address will be zero which indicates > the end of the buffer. > In what sort of situations would this occur? It seems like something we would want to avoid if possible? > This patch drops the entire branch record which would have otherwise > confused the user space tools. > > Signed-off-by: Anshuman Khandual <[email protected]> > --- > arch/powerpc/perf/core-book3s.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c > index 12b6384..c246e65 100644 > --- a/arch/powerpc/perf/core-book3s.c > +++ b/arch/powerpc/perf/core-book3s.c > @@ -452,7 +452,6 @@ static void power_pmu_bhrb_read(struct cpu_hw_events > *cpuhw) > * In this case we need to read the instruction from > * memory to determine the target/to address. > */ > - > if (val & BHRB_TARGET) { > /* Target branches use two entries > * (ie. computed gotos/XL form) > @@ -463,6 +462,8 @@ static void power_pmu_bhrb_read(struct cpu_hw_events > *cpuhw) > > /* Get from address in next entry */ > val = read_bhrb(r_index++); > + if (!val) > + break; > addr = val & BHRB_EA; > if (val & BHRB_TARGET) { > /* Shouldn't have two targets in a
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