On Wed, 2016-02-03 at 21:32 +0000, Edward L Swarthout wrote:
> From: Scott Wood:
> > On Mon, 2016-02-01 at 03:57 +0000, Zhiqiang Hou wrote:
> > > Any comments?
> > 
> > Only that it was submitted too late for the last merge window, and I have
> > not
> > yet begun processing patches for the next one.  If you meant this to be a
> > fix
> > important enough to go in outside the merge window, it's missing any
> > statement
> > of what the actual symptoms are.
> > 
> > > -----Original Message-----
> > > From: Zhiqiang Hou [mailto:zhiqiang....@freescale.com]
> > > To: linuxppc-dev@lists.ozlabs.org; b...@kernel.crashing.org;
> > > Subject: [PATCH] powerpc/fsl-pci: Correct the comparison of the LTSSM
> > > 
> > > Only the value PCIE_LTSSM_L0 stands for the link is up, instead of >=
> > > PCIE_LTSSM_L0.
> > > 
> > > diff --git a/arch/powerpc/sysdev/fsl_pci.c
> > > b/arch/powerpc/sysdev/fsl_pci.c
> > > @@ -73,7 +73,7 @@ static int fsl_pcie_check_link(struct pci_controller
> > >                     early_read_config_dword(hose, 0, 0, PCIE_LTSSM,
> > > -           if (val < PCIE_LTSSM_L0)
> > > +           if (val != PCIE_LTSSM_L0)
> > >                     return 1;
> 
> This patch is incorrect as there are actually two states L0 and L0s
> (standby) 
> that indicate an active link (a LTSSM value of 0x11 or  0x12).
> 
> The next user manual revision should contain this detail.

The next manual of what chip?

Are there any non-active states for which the current test does not work?

-Scott

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