On 9/5/06, Reeve Yang <[EMAIL PROTECTED]> wrote:
> I'm kind of curious what's the proper way to reset the
> 8245 CPU? For anyone who doesn't know MPC8245, which is 603e core.
You could starve the watchdog (assuming SWE=1 in SYPCR). If you own
the hardware design, you could add an addressable WO latch (FPGA) that
asserts reset for the right number of clock cycles (what I would
normally provide or ask for in a design -- but *only* during
development). Otherwise... If this is for development purposes,
consider using JTAG (Boundary Scan) to control /SRESET.
(My reference to RST was supposed to be humorous -- as in, remember
the good old days when you could do that in S/W?! ('RST 7' in Z80 &
8085) Sorry for my bad humor.)
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