According to the Lite5200B schematic
http://www.freescale.com/files/32bit/hardware_tools/schematics/lite5200BSCH.pdf

PSC2_4 is tied to a signal called PWR_DN_CTL_STS via a zero ohm resistor
R88.  If you want to use PSC2_4 as something else you probably need to
remove R88.

On 12/15/06, John Rigby <[EMAIL PROTECTED]> wrote:

Have you looked at the Lite5200B schematic to see where the signals in
question go?  Maybe you trying to drive something tied to ground high or
vice-versa.

On 12/15/06, Pedro Luis D. L. <[EMAIL PROTECTED]> wrote:
>
> Hi all,
>
> I not pretty sure if this is the correct forum to ask for a solution but
> I
> know that some of you have worked on a driver to make PSCs in this board
> work in an I2S mode.
>
> Have you ever have powerfail problems when writing the configuration
> registers for this mode?
>
> I´ve delimited the problem:
> - GPIO Port Config register stores without problems the value "111" in
> bits
> 25:27 (PSC2 to work in CODEC2 functionality with MCLK).
> - When I write a "1" in PSC2->SICR register bit GenClk  to ensure that
> clock
> and FrameSync are generated internally from MCLK the systems suffers a
> powerfail and I suppose that´s consecuence or some kind of shortcircuit.
> I´ve followed the same steps made by Bob Peterson in
> http://ozlabs.org/pipermail/linuxppc-embedded/2005-September/020210.html
> to write the configuration in the proper registers but I still suffer
> the
> powerfail when GenClk is activated or, if I activate that bit first,
> when
> Port Config is written.
> I´m also trying to understand how things are done in Roman Fietze driver
> but
> can´t find a difference. That makes me think that perhaps other
> registers
> must be modificated before driver loading. Meanwhile, I keep waiting for
>
> Grant Likely release, :-).
> Has this happened to someone before?
>
> Thanks for your help.
>
>     Pedro.
>
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