On Feb 5, 2007, at 6:51 PM, Russell McGuire wrote: > > I think I might be getting someplace on this debugging of the PCI > slots. > > I solved the erratic SLOT 3 issue, it was a hardware problem. A net > was > unconnected, I should shoot the designer. Anyway, this was fixed > that so all > slots are 100% consistent. > > I think general issue is probably a setup problem with the PCI > bridge chip. > Though I do not know how U-boot and Linux set up the bridge. > > But after reading through the Bridge documentation, I have learned > that each > bus must have the memory map declared in it, for all three memory > spaces. > I.e. the base and the upper limit for each mem, mmio, and IO space. > > When I boot into Linux, with PCI cards plugged in, and I read these > registers it looks as if the base address is correct, but the upper > limit is > actually set one byte below the base address. To me this effectively > prevents all access to the memory region, halting it at the bridge > chip. > Would explain why the only region I can seem to read is the > configuration > space. > > I guess the question is, does Linux only enable these ranges if a > card is > actively using them. Or is BIOS supposed to have these enabled > before the OS > gets access to the bridge?
In theory Linux should be able to handle this, in practice its easier to have u-boot setup the bridges. I'd ask around on the u-boot list about how to use the u-boot mechanisms to preconfigure devices (if its not obvious from the code). - k _______________________________________________ Linuxppc-embedded mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-embedded
