Hi Bhupi
Thanks for the response.
I tried with all the free irqs as per /proc/interrupts in request_irq
function one in each trial. But in none of them it jumped to interrupt
handler.
Please let me know whether this is the one you said to try or anything
else. ?
Thanks
Sudheer
Bhupender Saharan wrote:
Hi Sudhir,
From the PCI dump it looks like IRQ PIN register is 0. During
enumeration when BIOS sees that IRQ PIN register is 0, it would not
allocate any interrupt for this card and that's why you are seeing IRQ
Line register also as 0 value.
We need to do some work around for this.
IN the driver you need to register for all the pci vectors( INTA,B,C
and D). You would be called for any interrupt happening on the bus.
you have to check if the interrupt is for you and then claim it
otherwise return that interrupt is not for you.
Regards
Bhupi
On 6/16/07, *sudheer* <[EMAIL PROTECTED]
<mailto:[EMAIL PROTECTED]>> wrote:
Hello All
I am working on MPC8540 board placing it in the PCI slot of the
x86 system.
After system bootup , i could see the powerpc board detected and pci
config space configured.
But i could not find any IRQ assigned for it.
SetUp:
Host: x86 System- Linux-2.6.9
HOST PCI Slot is 64-bit, 66MHz
Agent: MPC8540 Board.
Here is dump of "lspci -vx " for this device.
04:03.0 Power PC: Motorola MPC8540 (rev 20) (prog-if 01)
Flags: bus master, 66Mhz, fast devsel, latency 64
Memory at dee00000 (32-bit, non-prefetchable) [size=1M]
Capabilities: [60] #00 [0000]
00: 57 10 08 00 46 01 b0 00 20 01 20 0b 00 40 00 00
10: 00 00 e0 de 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 60 00 00 00 00 00 00 00 00 00 00 00
From the above dump - IRQ Pin & Line of config space shows zeroes.
I tried writing a small module and probing for IRQ generating a
message
interrupt. Though i could see in the 8540 message status register that
interrupt is generated, i could not get any IRQ when i do the
probe. For
this trial, i have configured the PIC message enable register,
message
vector/priority and destination registers, processor current task
priority register (CPTR).
Can anyone give me some suggestions to try out.
Thanks
Sudheer
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