Bora ?ahin wrote: >Hi Federico, > >FL> I meant that you have to stress-test the bus connection that you are >FL> going to use to whatever graphic hardware you >FL> select - you cannot count on embedded hardware being bleeding-edge >FL> performance, and you are going to play 25 or 30 frames a second over >FL> that bus -- it is a lot of data, and you have bandwidth (hopefully not a >FL> problem with pci) and jitter (delay variance) constraints. > >Sory for the late answer... > >I see you. In fact I know it but some blurry situations is matter. We use >IBM-PPC. It has >CoreConnect bus. I dont know implementation details of it but it has three >different buses. One is >PLB. This is for speedy ones. PCI bridge is in this bus also. AFAIK, data and >addres bus of it is >decoupled. Clock speed is also high. I think it also support burst mode. So in >the light of these >infos it seems enough. So PCI is enough, this one sholud be enough also. > >But as you said, we should take into consideration that these cpus and buses >are embedded and at >some points, may have clipped version of desktop brothers. > > > Exactly. And even when the cpu is not clipped, the board might be (I am handling right now a fully complete Motorola MPC8272 based design, the chip supports PCI burst, the board design, however, does not).
-Federico -- _________________________________________ -- "'Problem' is a bleak word for challenge" - Richard Fish Muad'Dib of Caladan (Federico L. Lucifredi)- Harvard University & BU http://metcs.bu.edu/~lucifred
