Hello all, I'm designing a board with 405GP processor. I'm now trying to have it working with a 405GPr version. I've started to configure it working in legacy mode and made the necessary changes in PPCBoot.
Once downloaded, my kernel hung in early_init function when it called the memset_io to zero the BSS. Using a BDI2000 debugger, I saw that I've reached the bad_page_fault function. The only difference I know between 405GP and 405GPr in legacy mode is data cache size. How does the kernel manage it? I'm currently using kernel 2.4.18 from Montavista. Any help is welcome, Laurent Laurent MOHIN ACTERNA ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
