Eugene Surovegin wrote: > I believe there is a bug in flush_dcache_all implementation for not cache > coherent processors. > > This function uses simple algorithm to force dcache flush by reading > "enough" data to completely reload the cache:
[snip] So you're saying it doesn't use an LRU replacement algorithm but a FIFO one? > 1) Use twice as much memory than the cache size. This solution is not very > efficient, > but it doesn't add _any_ special requirements to the memory we use to > reload the > cache with. That doesn't work correctly, either, in that case. You have to read the same memory region twice, not read a twice as big region once. Segher ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
