All of the suggestions are good ones.. Also, in 2.6 I've recently
submitted patches that add emulation of these instructions in the
kernel.
Its odd, but I would have expected a GCC configured for e500 not to
generate the ld/st string instructions by default, but the -mno-string
is what we do in the kernel to ensure that.
- kumar
On Apr 28, 2005, at 5:21 PM, Kylo Ginsberg wrote:
> Chiradeep,
>
> I have the same issue with gcc3.4.3 and an e500 target.? You can give
> gcc the -mno-string to inhibit generation of those load/store string
> instructions.? I don't know if gcc can be configured such that its
> default is not to generate those instructions.
>
> Cheers,
> Kylo
>
> On 4/28/05, Chiradeep Vittal <chiradeep at matissenetworks.com> wrote:
> > It turns out to be a compiler issue.
> > We're using gcc 3.4.3 with optimization level -Os. The following
> program will generate the illegal instruction with -Os but not with
> -O2
>
> >???????? int main (int argc, char** argv)
> >???????? {
> >?????????? int seq[] = {0, 1, 2};
> >?????????? return 0;
> >???????? }
> > The reason is that the compiler generates code with the stswi
> instruction which is not supported by the e500. Here's our compiler
> configuration:
>
> > Configured with:
> /home/steve/perforce/sw/opt/crosstool/build/powerpc-8540-linux-gnu/
> gcc-3.4.3-glibc-2.3.2/gcc-3.4.3/configure
> --target=powerpc-8540-linux-gnu --host=i686-host_pc-linux-gnu
> --prefix=/home/steve/perforce/sw/opt/cross-compile/powerpc-8540-linux-
> gnu/gcc-3.4.3-glibc-2.3.2 --with-cpu=8540
> --enable-cxx-flags=-mcpu=8540
> --with-headers=/home/steve/perforce/sw/opt/cross-compile/powerpc-8540-
> linux-gnu/gcc-3.4.3-glibc-2.3.2/powerpc-8540-linux-gnu/include
> --with-local-prefix=/home/steve/perforce/sw/opt/cross-compile/powerpc
> -8540-linux-gnu/gcc-3.4.3-glibc-2.3.2/powerpc-8540-linux-gnu
> --disable-nls --enable-threads=posix --enable-symvers=gnu
> --enable-__cxa_atexit --enable-languages=c,c++ --enable-shared
> --enable-c99 --enable-long-long
>
> >
> > Any recommendations?
> >
> > Thanks
> > --
> > Chiradeep
> >
> > -----Original Message-----
> > From: Kumar Gala [mailto:kumar.gala at freescale.com]
> > Sent: Wednesday, April 27, 2005 11:37 AM
> > To: Chiradeep Vittal
> > Cc: linuxppc-embedded at ozlabs.org
> > Subject: Re: Linux Kernel Issue: MPC8540 Errata (CPU29)
> >
> > On Apr 27, 2005, at 12:46 PM, Chiradeep Vittal wrote:
> >
> > > We're running Linux Kernel 2.4.26 on an 8540 ADS derivative. We're
> > >? seeing an
> > > "illegal instruction" (SIGILL) exception under some circumstances
> > > (during a pthread_create call). We were wondering if this could
> be a
> > > symptom of
> > > CPU29 and if there is a patch available for CPU29.
> > >
> > > "CPU29 L1 instruction cache gets multiple entries for same line
> after
> > >? change
> > > in MSR[IS] bit "
> > >
> > > www.freescale.com/files/32bit/doc/errata/MPC8540CE.pdf
> >
> > The way the Linux kernel manages the MMU on e500 it doesn't actually
> > ever modify MSR[IS] or MSR[DS].? They are always zero so I dont
> believe
> > you are hitting this errata.
> >
> > Are you running with math emulation turned on?? Do you know what the
> > instruction is that causes the SIGILL?
> >
> > - kumar
> >
> > _______________________________________________
> > Linuxppc-embedded mailing list
> > Linuxppc-embedded at ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >
