Hi list, we're currently designing a custon MPC8541 based board having three ethernet connections. For some reasons, we'd like to use the FCC1 and 2 + TSEC1. From what I see from the docs, it should be no problem to connect i.e. a quad phy (for FCC1/2) and a gigabit phy (for TSEC1) to the EC_MDIO of the TSEC as long as they have different addresses. I don't want to use the GPIO stuff for MDIO.
The question is, what does this mean to the drivers? For the gianfar driver this should be okay and from what I see, the upcoming fs_enet driver supports also a phy connected either to the GPIOs (bitbanging) or the TSEC MDIO. Is this right, or am I missing something essential? Would it be better to use the GPIO-MDIO for the FCC phy and the TSEC-MDIO for the TSEC phy? TIA Gerhard
