mgberry at ellipticity.com wrote: >Has anyone experienced any issues with the Rev. B silicon for the >MPC5200. We are seeing Linux hanging and are suspecting the SDRAM >errata for Rev. B. If we disable the cache this seems to improve >but will still crash over time in heavy loads. We have not seen any >of these type issues with the original rev.
Are you sure you have revision B of the MPC5200? Freescale has announced a "B" version, but I don't believe that any of them have hit the public yet. There may be some engineering grade samples out there. (Let me know if you really do have "B" parts. Freescale has been telling me "real soon now" since last year) More likely you're seeing the "B" in the part number, as in MPC5200CBV400. The chip revision is the "mask set" on the next line of printing. The latest public version I know of is L25R. The L25R version has a major bug that you basically can't use two CS pins for SDRAM, and the DDR implimentation is borderline at best. Exactly what problems are seeing? What hardware platform do you run on? We're using an MPC5200 with SDR-SDRAM running at 132MHz (two 16 bit SDRAM devices), and haven't seen any issues. I don't know what bootloader you're using, but I believe uboot has basic memory testing built in. This would allow you to isolate memory issues from software issues. Eric ------------------------------------ Eric Johnson, Electrical Engineer Advanced Communication Design 7901 12th Avenue South Bloomington, MN 55425 Ph: 952-854-4000 Fax: 952-854-5774
