On Jul 11, 2005, at 6:38 AM, Absolut Hunter wrote:
> ..... However, my goal is
> to map SRAM <8ns speeds> down to the address 0x00000000, to map the
> vector
> table, so I can achieve a very fast interrupt response time.
The things Linux does to cause interrupt latencies are going to ensure
you aren't going to see any differences to the "interrupt response
time." :-)
From a system perspective, you are going to be much better off using
your SRAM for CPM data buffering than for any general software use.
> Does anyone have any idea what would cause this instability?
Yeah, I can't find a way to actually map the memory as you have
described. You actually have the SRAM and SDRAM multiply mapped
on top of one another, and depending upon which chip selects
are used and the values in their registers, you are selecting between
the two memories. Several cases exist. You are either mapping the
SRAM on top of the SDRAM, or vice versa. You really have only 32M
of memory available, so any access to the "upper" 2M is wrapping
around to the lower memory. Basically, you have a big mess ;-)
You need to map these memories to modulo their size, so to put
the 2M at low memory, you are going to have a hole up to a 32M
boundary before you can map the SDRAM. It's possible to do
this, but not without some custom Linux modifications.
Thanks.
-- Dan
