Hello, My problem is concerned with the multi channel controller MCC2 on MPC8250. Its task is to relay messages from D channels between Local Exchange and ISDN BRA subscribers. All active D channels (up to 128) are aggregated into single stream tied directly to the TDMc2, ie. both TDMc2_Rx and TDMc2_Tx are divided into 2-bit channels. 2.048MHz clock and 8KHz frame pulse are generated externaly and are connected to corresponding processor pins (common pins for receive and transmit sections).
When tested with internal loopback (SI2MR[SDM2]=0b10) everything works fine, ie. for example the message we send through channel 0 is received correctly on channel 0. However, it doesn't work in real application. The debugging process led me to this simple test. I connected TDMc2_Rx and TDMc2_Tx to FPGA in which I implemented the delay of N frames (N x 125us, since the frame pulse is 8KHz), such that for N=0 I have simple external loopback, for N=1 delay of one entire frame, and so on. I was sending messages through channel 0 (it is the only channel I actually started). The results I obtained were very strange. For N=0, N=4, N=8 the received message was correct, but for N=1,2,3 it was not (I was usually reported CRC erro,r or non octet alignment error, or abort).When I tried with 4-bit channels, the result was correct for N=0,2,4,.... Only with 8-bit channels I obtained correct result for all frame delays. The fact that everything works fine with 8-bit channels makes me believe that all MCC and SIRAM settings are ok. I tried many combinations of SIRAM programming (For example, I tried to program only channel 0 as 2-bit and all others as 8-bit, or as null entries), but it didn't work out. It is also worth to mention that I have never received GUN or GOV errors. Has anybody dealt with 2-bit channels on MCC? What can cause such problems (remember that everything works fine with 8-bit channels). I would also appreciate if somebody has the possibility to implement similar test. Regards, Stevan
