Dan Malek wrote: > > On Sep 27, 2005, at 10:11 AM, Kalle Pokki wrote: > >> Any ideas what can set the bootmem memory as cached? > > All of memory is always cached on 82xx. Which is fine > since the cache controller keeps the processor core > and peripherals coherent in hardware.
OK. Then the question really is why isn't the cache controller enforcing coherency between the G2_LE core and the CPM. While trying to debug the console driver I wrote a really simple SCC driver separated from the rest of the kernel in order to have a usable debug printf. And I couldn't get any buffers printed through the SCC until I started to use buffers in DPRAM. The CPM just didn't see anything I wrote to the buffers. The same thing seems to bother at least the console driver and the FCC ethernet driver (though they don't work at all for me at the moment..) I think it is obvious I have misconfigured something, but at this point I am not even sure if it is something I should have initialised in the boot loader.
