> Url: > http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20050805/a2aa0d78/attachment-0001.eml
------------------------------ Seems that Philips has put out an errata not too long ago for this chip which isn't in any public errata document that we could find. Here's how it reads: Problem: With the ISP1105/6 used as a Universal Serial Bus (USB) transceiver in a Host Controller application, when a low-speed device is connected, it does not get enumerated. Full-speed devices, however, are properly enumerated. When pin OE_N goes HIGH, the ISP1105/6 must be in receive mode and the DM line should be detected as HIGH because of the pull-up resistor on the D? line in the case of the low-speed device. But in the ISP1105/6, the D? line rises very slowly, taking almost 30 ms. This affects enumeration. Workaround: In the ISP1105, the problem can be resolved by ORing VO with OE_N to produce VO to the ISP1105. This is applicable when the MODE pin is configured as LOW; single-ended input data interface. This circuit will ensure that VO is held HIGH till OE_N is HIGH, ensuring that the compensation logic is not turned on. In the ISP1106, this must be implemented by ANDing OE (inverted OE_N) with VMO to produce VMO to the ISP1106. Nathan Zeitler Hardware Engineer Open Systems International, Inc. 3600 Holly Lane North, Suite 40 Minneapolis, MN 55447-1286 Phone: (763) 551-0559 Fax: (763)551-0750 Email: nzeitler at osii.com
