Hi David, I never used DMA on 440EP/GP till now so I just noticed the two different PLB's and their DMA controllers. Never seen this on any 4xx PPC so far. I suspect that the PLB4 is integrated mainly because of the USB interface.
On Monday 06 February 2006 00:47, David Hawkins wrote: > I took a look at the 440EP user manual, and I haven't been > able to explain the PLB4 DMA controller observations. > > Here's what I've got so far; > > p595: PLB-to-PCI transaction handling > Shows the two situations where the PCI bridge will > generate memory-read-line (MRL) and memory-read-multiple (MRM) What version of the user manual are you referring to? Could you please give the pages for the current manual (Revision 1.18). <snip> > (I hope you had a nice vacation Stefan!) Thanks. Very nice. One week of sunshine in the snow. :-) Ciao, Stefan
