Since I have set IIP to 1, reset vector is at 0xfff00100. IMMR is 0x00f00000. So, putting RAM at address 0x0 allows only 15MB of RAM at address 0x0 (ISA style).
As memory and internal processor registers would conflict, I would have a memory hole. Hence, the logical choice of putting RAM at a different location. So, if MMU allows shadowing (which I have not read), it could solve my problem. Regards, Atul
