On 2/14/06, Eugene Surovegin <ebs at ebshome.net> wrote: > > Try writing the same GPIO output register value as you read from it > (without clearing bit 11). Also, try changing some other GPIO bit > (e.g. one which is not connected in your design). Maybe board hangs > exactly because you set GPIO bit 11 low :).
Bingo! The board wasn't actually hanging. When we set GPIO11 low, it is supposed to reset our on-board FPGAs. One of the FPGAs controls a TX disable signal. And the (current) default on a reset is to leave the TX disable low, hence no network after a FPGA reset. Doesn't work well with a NFS root :) > > Also, connect scope to that GPIO pin and see what is really going on. > > -- > Eugene
