Dan Malek wrote: > > On Jun 8, 2005, at 5:29 AM, Alex Zeffertt wrote: > >> Does anybody know why it isn't built for 6xx cores? > > > Because 6xx cores are cache coherent and there shouldn't > be any need for "uncached" memory regions. > >> I'm working on the ATM driver and it seems that certain external memory >> areas accessed by the PQII CPM by-pass the cache. > > > That's news to me, and I've written lots of CPM drivers, including ATM. > Do you have a specific example? >
I may also need consistent_alloc for some testing reasons Dan. :) > Thanks. > > -- Dan > If I build arch/ppc/mm/cachemap.c will it work for 82xx? Any reason not to? Regards Pantelis
