I am working on a platform with an mpc8270 processor running a
kernel from the latest 2.4 development tree. I have created a driver based
on uart.c for one of the SCCs.
The receive buffers are allocated using the m8260_cpm_hostalloc(). I am
getting receive interrupts and verfied that the data is written by the cpm
to the correct physical memory location using a logic analyzer. However the
data that is read from the buffer is incorrect. As a sanity check, I
allocated my buffers using m8260_cpm_dpalloc() and I then read the correct
data.
I've looked through the hostalloc function as well as the
__alloc_bootmem() function that initially allocates two pages of data for
the CPM in mpc8260_cpm_reset(). It is unclear to me how this memory can be
in a PAGE_NO_CACHE region as it needs to be for the CPM. I'm not sure if it
is something in my system initialization that would put the memory that
alloc_bootmem() uses in a noncacheable area or if the memory initially
allocated for the CPM in mpc8260_cpm_reset() needs to be done differently.
Tom
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