On Mar 7, 2006, at 9:54 AM, Russell McGuire wrote: > Thanks all... > > The author of that comment humbly apologizes for his ineptitude on > the FPU. > > It would appear both cores have the same number of execution units, > i.e. 5 > So David, I guess in all this the only real difference seems to be > the bus > architecture, raw clock speed, and perhaps a few new instructions. > I checked > both manuals this morning and they do differ in some small ways. > > * 603e, up to 4 instructions in the pipeline, only 3 being complete > per > clock > * e300, up to 5 instructions in the pipeline, still only 3 being > completed > or start per clock. > * Add/compare instructions are now executed in the IU unit instead > of the > load/store unit. May be the same, but wasn't specific in earlier 603e > manuals. > * One more HID0 bit than G2, ability to interrupt based on cache > parity > error > * new icbt instruction, instruction cache initialization > > So there is a section inside the 8360E manual that outlines the > specific > enhancements. "Features specific to the e300 core not present on > the G2 > processors follow:" Page 1-5. > > So I guess my question is back up, does anyone know if an optimized > compiler > would offer any noticeable performance enhancements in regards to > these > changes? Other than the obvious instruction being added?
If you are asking about relative performance between the same compiler tuned for a 603 vs e300, the there would most likely be a small improvement. However, a few things to note. The new icbt instruction is really intended for hand written assemble code and its highly unlikely that a compiler will ever generate it. Second, the other improvements from the base 603e/G2LE in 8280, like doubling of the L1 caches has a significant improvement in performance. - kumar
