Tom Rini wrote:
> My guess and recollection is that the 8260 version of this was to
> disable the DCACHE in a certain manner, because of buggy silicon on a
> specific board. Someone unmerged this bit of code later I think.
Hmm....OK. FYI, on any processor core except 8xx you can't disable
the data cache and expect to make any progress without also removing
the cache management instructions. That would be a pretty ugly patch
and also require unique libraries for the applications. :-)
-- Dan
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