Barbier, Renaud (GE Infrastructure) Mon, 6 Dec 2004 12:23:09 -0600
can someone explain to me the purpose of the TS bit in the 440GX TLBs? In the 440GX BSP, what is the point to map twice memory offset 0 (once with TS=0 and once with TS=1). Is that for context switch?
