On Fri, 08 Oct 2004 01:12:51 +0100, Jon Masters <jonathan at jonmasters.org> wrote: > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > > The polled approach is worse IMO although I agree that there is very > little overhead in the actual ISR. Where the author went wrong (well > perhaps not wrong per se but didn't provide enough protection) was in > the unlikely case that the hardware is braindead and generates > interrupts that you didn't ask it to - the xsysace driver should also > catch interrupts when we're QUEUE_EMPTY and should not try to manipulate > an empty request queue. > > Jon.
The problem I saw was that I can't turn off the interrupt at all. Once I start one write command, the ISR keep coming in. I review the verilog code and schematic multiple times with the HW group but can't figure out what went wrong. My best guess was the BUFRDY line is mix up with the ISR line some how when write cmd and when IDEN drive command is issued. I try turn off the ISR on write with SYSACE register and the ppc interrupt control register. None of them worked. Jon, Do you think if we add a small DMA engine would help the performance or the performance problem is caused by the sysace firmware + the CF disk? The sysace controller IS VERY fast on loading the bitstream and linux boot image. -- -Tony Having a lot of fun with Xilinx Virtex Pro II reconfigurable HW + ppc + Linux
