On Nov 16, 2007 4:46 PM, Kumar Gala <[EMAIL PROTECTED]> wrote: > > > On Nov 16, 2007, at 3:28 PM, robert lazarski wrote: > > > On Nov 16, 2007 3:44 PM, robert lazarski <[EMAIL PROTECTED]> > > wrote: > >> On Nov 16, 2007 10:27 AM, Clemens Koller > >> <[EMAIL PROTECTED]> wrote: > >>> The SRESET# (pin AF20) is the soft reset input, causes > >>> an mcp assertion to the core.... (RTFM) > >>> > >> > >> That's what we are doing. The 85xx docs say "Soft reset. Causes a > >> machine check interrupt to the e500 core. Note that if the e500 core > >> is not configured to process machine check interrupts, the assertion > >> of SRESET causes a core checkstop. SRESET need not be asserted during > >> a hard reset." > >> > > > > Sorry for replying to myself, but thought I'd mention SRESET works > > fine on 85xx 2.6.23 , ie, the board resets after kernel panic. It > > doesn't work for me on 2.6.24rc2 . > > What actual 85xx are you using? > > - k >
Custom 8548 board. I'm using the cds 85xx code for a reference and I calling the same reset functions. Robert _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
