Hi, khollan wrote:
>Now that Full Linux can run on Microblaze with the addition of the MMU, are >there plans to enable Symmetric Multi-Processing of two or more Microblaze >cores running Linux? > > This isn't really the right list for direct microblaze discussion, but since you asked.. The challenge with SMP is not an MMU, but cache coherency. This is why native SMP on dual PPC on V4/V5 is also a non-starter. It is possible to build software driven snoop/invalidate mechanisms that might allow a crippled SMP on MicroBlaze, but I think the performance would be pretty nasty. The Blackfin Linux team have done some interesting things towards SMP on non cache-coherent dual CPUs. Basically they do a local cache invalidation upon acquiring any kernel lock, on the theory that if you are accessing a shared data structure you will grab a lock first. Thus, the cache flush will make sure you get the "true" value, not some stale locally cached result. But, it's still pretty inefficient, and cannot do things like processor affinity and process migration. Google the bfin lists for details and patches. Regards, John _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
