Jocke, I'll let you know if I find any. For a starting point, I have an QE ATM driver, that is more than likely similar in design <though no Ethernet interface>, as it supports the QE engine, and just turns the UCC into ATM mode, as opposed to HDLC mode. Would imagine the buffering, IO, interrupts are similar. I am still in process of porting it up from the 82xx CPU.
Although HDLC how it registers itself into the kernel is a mystery to me, I am having trouble finding any HDLC drivers to model this after. Know of any specs? API? Etc... -Russ > -----Original Message----- > From: Joakim Tjernlund [mailto:[EMAIL PROTECTED] > Sent: Tuesday, January 15, 2008 4:19 PM > To: [EMAIL PROTECTED]; linuxppc-embedded@ozlabs.org > Subject: SV: Driver - HDLC 83xx QUICC Engine?? > > > -----Ursprungligt meddelande----- > > Från: [EMAIL PROTECTED] > [mailto:linuxppc-embedded- > > [EMAIL PROTECTED] För Russell McGuire > > Skickat: den 15 januari 2008 20:52 > > Till: linuxppc-embedded@ozlabs.org > > Ämne: Driver - HDLC 83xx QUICC Engine?? > > > > All, > > > > Does anyone know of a project or existing driver for supporting HDLC for > the > > > > MPC83xx or MPC82XX Freescale CPUs? > > > > Looking to run raw HDLC over various Ethernet or T1 links. > > > > -Russ > > Me too. Perhaps not, I will be looking at presenting a Ethernet i/f to the > kernel but > sending out HDLC frames containing the Ethernet packet. If you find/have > anything > that helps me do that, send it my way please. > > Jocke _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
