Hi , I am now developing my own IPs and when I try to synthesize normally I get an error because the router finds no place to fit everything. I have resynthesized using the option:
XIL_PAR_ENABLE_LEGALIZER=1 ( loading the program with that variable on > XIL_PAR_ENABLE_LEGALIZER=1 xps). It took so much time because it uses a much more consuming algorithm but I managed to build it correctly. Regards, /A llandre wrote: > Hi Mohammad, > > I've just had a look at the messages you generously posted in the ml > about your experience with linux on V4 FX12 FPGA. > I'd like to ask your opinion about FX12 practical usability in this > context (gigabit PLB TEMAC/linux). > In this message > > http://article.gmane.org/gmane.linux.ports.ppc.embedded/16816 > > you say the device is completely full. If I understand correctly your > system provides just the devices required to run the bandwidth test so > it seems there is no room for user logic (I think you did not even add > the memory controller required to access the NOR Flash containing > bootloader, kernel image and root fs that is clearly mandatory for > standalone product). Is that true? If it is, this limits a lot the > flexibility of this architecture in this configuration. What do you think? > > > > Regards, > llandre > > DAVE Electronics System House - R&D Department > web: http://www.dave.eu > email: r&[EMAIL PROTECTED] > _______________________________________________ > Linuxppc-embedded mailing list > [email protected] > https://ozlabs.org/mailman/listinfo/linuxppc-embedded > > _______________________________________________ Linuxppc-embedded mailing list [email protected] https://ozlabs.org/mailman/listinfo/linuxppc-embedded
