Chris Skepper wrote:
Using code to flash an LED I have traced execution from the entry point
in head_32.S, through to call_setup_cpu in misc.S, __setup_cpu_603 and
into setup_common_caches in cpu_setup_6xx.S. It appears to reset when
enabling the cache on the CPU:
setup_common_caches:
mfspr r11,SPRN_HID0
andi. r0,r11,HID0_DCE
ori r11,r11,HID0_ICE|HID0_DCE
ori r8,r11,HID0_ICFI
bne 1f /* don't invalidate the D-cache */
ori r8,r8,HID0_DCI /* unless it wasn't enabled */
1: sync
/* Chris: Reaches here. */
mtspr SPRN_HID0,r8 /* enable and invalidate caches */
sync
mtspr SPRN_HID0,r11 /* enable caches */
sync
isync
/* Chris: Never gets to here. */
blr
FWIW, commenting out the lines above causes it to hang when attempting
to enable the MMU, which is the next step in the process.
How are you determining that it never gets to that point? If it's via
serial I/O or similar, be aware that I/O isn't going to work when caches
are enabled but the MMU is not.
Also, can anyone confirm that the MPC8247 is supported by a 2.6.26
kernel with ARCH=powerpc mode? I think it should be, but it would be
good to know that someone has tried it.
I've booted an MPC8248 (and some other 82xx) on 2.6.26. MPC8247 should
work.
-Scott
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