On Wed, Aug 27, 2008 at 5:11 PM, Roland Dreier <[EMAIL PROTECTED]> wrote:
> > The problem now is that that PCI register space gets mapped with
> > caching enabled (by looking at the TLB contents), so I still can't
> > control the device. I did some search and indeed UIO device driver
> > came up, I'll read the article. I was wondering though if there is a
> > simpler way to modify cache attributes of a region. mmap() doesn't
> > seem to provide an interface for that, is there some other function to
> > call to configure 'cache inhibit' attribute for a region?
>
> The issue would be related to phys_mem_access_prot() not doing the right
> thing in this case. In fact it looks like the arch/powerpc
> page_is_ram() implementation has the same bug that I fixed a long time
> ago for arch/ppc in 8b150478 ("[PATCH] ppc: make phys_mem_access_prot()
> work with pfns instead of addresses"). I'll send a patch a little later
> that you can try out.
>
Ronald, I will appreciate the patch that very much!
TIA,
/vb
> - R.
>
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