Thanks for that info Scott. However I am still stuck.
Please take a look at how I adjusted the DTS:
[EMAIL PROTECTED] {
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
phy3: [EMAIL PROTECTED] {
reg = <3>;
device_type = "ethernet-phy";
};
phy1: [EMAIL PROTECTED] {
reg = <1>;
device_type = "ethernet-phy";
};
};
[EMAIL PROTECTED] {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = < &phy1 >;
};
[EMAIL PROTECTED] {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <25000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
phy-handle = < &phy3 >;
};
Also note that our new PHY does not support gbit.
I've made sure that the HCW is set for MII and not
GMII which allowed us to load the kernel via uboot and
TFTP. Even though the phy is still blinking away, we
see no data come out of the board after TFTP is done.
Here's the screen dump. Note that it looks like the
kernel is happy. Also note that we tested our
192.168.1.21 NFS server and it can connect fine and
has no firewall.
Thanks again
--- Scott Wood <[EMAIL PROTECTED]> wrote:
> Joe Shmo wrote:
> > What I don't know is what reg = <4> means. Is
> that
> > the phy address or the interrupt?
>
> It's the PHY address.
>
> > My phy is the National semi dp83848. It does not
> use
> > an IRQ. Should I replace this with zero? Should
> I
> > take that line out of the DTS file?
>
> You should remove the interrupts and
> interrupt-parent properties.
>
> -Scott
>
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