Yo Jacob E! On Tue, 24 Feb 2015 22:35:09 +0000 "Keller, Jacob E" <jacob.e.kel...@intel.com> wrote:
> Hopefully you can provide the ptp4l results alone without phc2sys or > the chronyd interfering. Sent, I think. > Like I mentioned use the testptp program > from the kernel Documentation to sanity check the device's clock. If I can figure out how to make it. > > kong ~ # ptp4l -i eth0 -l 7 -m -f ptp.conf & > > I recommend that you run with -l 6 ,since l7 prints a ton of debug > information that is nearly always not helpful and clutters reading > the time log output. Changed. > > delay 54241 48536 phc2sys[48410.054]: phc offset > > -13318750 s0 freq +0 delay 1582 ptp4l[48410.078]: > > clockcheck: clock jumped forward or running faster than expected! > > And at this point, the clock jumped. *something* twiddled with the > clock. Which clock? The system clock was stable at that time. > The "what" I am not sure. Also it seems weird that the phc > switched from a positive to a negative offset..? Yup, weird. > I assume you put the > NTP SHM into chronyd as a refclock? Yup. That way I can compare it to other clocks. I have a 'watch chronyc sources" going, I can see the phc2sys clock goes nuts then it takes a while before chronyd takes notice. Usually chronyd marks it a falsechimer, but occasionally follows it to crazy town for a while. > > ptp4l[48410.078]: master offset 70368744180811 s0 freq -10357 path > > delay 54241 > > ptp4l[48410.078]: port 1: SLAVE to UNCALIBRATED on > > SYNCHRONIZATION_FAULT > > At this point ptp4l has reset and now things get funky. I suspect > this is either a driver bug, or somehow you have other things > controlling the clock. Obviously both of us are stumped on what else > could be doing it... By 'the clock' you mean which clock? The system clock is not moving. So you mean the phc clock? > > Clearly bonkers now, so ^C. > > Yes its bonkers now because of whatever that clock jump invalid event > was that very much screwed all the settings. Well, at least tow of us see it. > > OK, I think that is what I'm doing. You can see above what I am > > doing. > Just to clarify, without phc2sys then you only synchronize the MAC > hardware clock and not the real system clock. Right, and confusing. In timestamp software mode ptp4l steers the NTP SHM (and then possibly, by way of chronyd, the system clock), but in timestamp hardware mode phc2sys steers the NTP SHM. RGDS GARY --------------------------------------------------------------------------- Gary E. Miller Rellim 109 NW Wilmington Ave., Suite E, Bend, OR 97701 g...@rellim.com Tel:+1(541)382-8588 ------------------------------------------------------------------------------ Dive into the World of Parallel Programming The Go Parallel Website, sponsored by Intel and developed in partnership with Slashdot Media, is your hub for all things parallel software development, from weekly thought leadership blogs to news, videos, case studies, tutorials and more. Take a look and join the conversation now. http://goparallel.sourceforge.net/ _______________________________________________ Linuxptp-devel mailing list Linuxptp-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/linuxptp-devel