On Sat, Oct 09, 2021 at 05:11:51PM +0300, Vladimir Oltean wrote: > The overall board design for my use case is that there's an SoC with an > embedded DSA switch, and hanging off of 3 ports of that embedded switch > are 3 external switches. Every networking device (the DSA master for the > embedded switch, the embedded switch, as well as each individual > external switch) has a PTP clock. The topology for PPS signal > distribution is fixed - that is given by hardware ability - the > /dev/ptp1 clock can emit a valid PPS, and all external switches can > timestamp that PPS (it is connected in a sort-of simplex "bus" design), > and it cannot be any other way around. It looks like this:
Thanks for the detailed explanation. Definitely want to support this kind of HW design. > - I created an extra abstraction in ts2phc as "struct clock" that would > represent what's synchronizable. The "master" and "slave" concepts > retain their meaning, which is: "master" == the device that emits PPS, > and "slave" == the device that timestamps PPS. This whole thing would be much easier to understand if we could replace "master/slave" with PPS source/sink. I'm not asking you to rename everything, but if you have the time and inclination, it would be really helpful to me to have Patch #1 simply rename ts2phc files and source code. With those terms in place, you can say things like "the PPS source is the synchronization target/destination" (which is the high level goal of this series). Thanks, Richard _______________________________________________ Linuxptp-devel mailing list Linuxptp-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/linuxptp-devel
