On Fri, 2022-12-02 at 15:33 -0500, vincent.cheng...@renesas.com wrote:
> From: Vincent Cheng <vincent.cheng...@renesas.com>
> 
> In handle_state_decision_event(), the update of the clock's parent
> pid after
> best master change is non-deterministic. It depends on the port
> processing
> order and bmc_state_decision() results.
> 
> Subsequent call to unicast_client_state_changed() via port_dispatch()
> may use
> stale parent pid and place UC FSM in wrong state.
> 
> 
> Signed-off-by: Vincent Cheng <vincent.cheng...@renesas.com>
> ---
>  clock.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/clock.c b/clock.c
> index 8177e77..55ca8d3 100644
> --- a/clock.c
> +++ b/clock.c
> @@ -709,6 +709,18 @@ static void clock_update_slave(struct clock *c)
>         clock_update_time_properties(c, tds);
>  }
>  
> +static void clock_update_parent_identity(struct clock *c)
> +{
> +       struct parentDS *pds = &c->dad.pds;
> +
> +       if (c->best) {
> +               pds->parentPortIdentity = c->best->dataset.sender;
> +       } else {
> +               pds->parentPortIdentity.clockIdentity = c-
> >dds.clockIdentity;
> +               pds->parentPortIdentity.portNumber    = 0;

Why is the port 0?
It make sense that defaultDS do not have port as we work in the context
of the clock.
Is it make sense to use port ID here?


> +       }
> +}
> +
>  static int clock_utc_correct(struct clock *c, tmv_t ingress)
>  {
>         struct timespec offset;
> @@ -2015,6 +2027,8 @@ static void handle_state_decision_event(struct
> clock *c)
>         c->best = best;
>         c->best_id = best_id;
>  
> +       clock_update_parent_identity(c);
> +
>         LIST_FOREACH(piter, &c->ports, list) {
>                 enum port_state ps;
>                 enum fsm_event event;


P.S.
All patches should be on top of master, no need to comment on obvious.
The rest of the explantation is perfect :-)

Erez

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