We have an ARM Cortex A8 Processor (AM3359) with an internal hardware Ethernet
switch. One of the switch ports is connected with the CPU and two ports of that
switch are connected to two external PHYs (DP83640). Both PHYs are connected to
the same MDIO bus. The aim of this setup is, that our devices (A and B) behave
like a PTP-Ethernet-switch using hardware time-stamping in the PHYs and
implement an BC (or even better an PTP v2 TC)
[http://kiwaglxswd06.ch.int.kistler.com/wiki/swd/images/1/1a/PTP_HW.jpg]
>From the CPU point of view, there is only one Ethernet MAC / Interface because
>the Ethernet switch is implemented as hardware module. The PHYs can be
>accessed separately using the MDIO bus.
Questions:
(1) Is it possible to use the Linux PTP Project to implement a Boundary
Clock with this hardware setup or would that require two independent MAC
interfaces?
(2) DP83640 Driver: I found several comments that the GPIOs of the PHYs
should be connected together on order to be able to synchronize the two PHYs
(recalibrate) but I did't find the detail information which GPIO of PHY
1should be connected to which GPIO of PHY 2.
Thanks for your help!
Reto Hermann
Senior Design Engineer Electronics
Kistler Instrumente AG
Eulachstrasse 22, 8408 Winterthur, Switzerland
Direct +41 52 2241 492, Main Office +41 52 224 11 11
[email protected]<mailto:[email protected]>, www.kistler.com
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